PLDs vs. FPGAs: What’s the Difference Between them?

What is PLD?

PLD programming

• In-circuit programming (ICP): PLDs can be programmed while they are inserted in a circuit using a technique called in-circuit programming (ICP). Typically, production applications adopt this technique.
• External programming (EPROM): PLDs can be programmed using external programming (EPROM), which involves removing the PLD from the circuit and using an external programmer. Applications in development and prototype are frequently employed with this technique.
• Flash programming (Flash): Flash programming is a similar technique to EPROM programming for PLDs, however it allows for numerous PLD reprogrammings. This approach is frequently employed in situations when it may be necessary to modify the logic function.

What is a FPGA Board?

FPGA programming

• High-level synthesis (HLS): High-level synthesis (HLS) is a technique for programming FPGAs that creates the programming information for the FPGA using a high-level programming language, such C or C++. Usually, complicated applications that demand a high level of performance adopt this approach.
• Verilog HDL: An FPGA's logic functions are described using Verilog HDL, a hardware description language. Usually, medium-to-complex applications adopt this approach.
• VHDL: Similar to Verilog HDL, VHDL is a hardware description language. The majority of the time, complicated applications adopt this technique.

Video related to PLDs and FPGAs

What is the difference between PLDs and FPGAs?

• Flexibility: PLDs are less flexible than FPGAs because they have a fixed amount of logic gates and a fixed connection fabric. Contrarily, by connecting many logic gates together, FPGAs can be programmed to implement a greater range of logic operations.
• Performance: Because FPGAs may be designed to implement specialized logic functions that are tailored for the particular application, they are often more performant than PLDs. PLDs, however, are usually restricted to implementing a predetermined set of logic functions.
• Cost: Because PLDs are easier to manufacture, they are often less expensive than FPGAs. On the other side, FPGAs are more expensive because their manufacturing is more difficult.
• Power usage: Because PLDs are easier to operate than FPGAs, they typically use less power. FPGAs, on the other hand, can have higher power consumption since they can be customized to implement more complicated logic tasks.
• Programming: Because PLDs support a more basic programming language than FPGAs, they are often simpler to program. On the other side, programming FPGAs can be more challenging because it calls for a more sophisticated programming language.
• Debugging: PLDs often require less debugging time than FPGAs due to their simpler architecture. However, due of their more intricate architecture, FPGAs might be more challenging to debug.

Tutorials of PLDs and FPGAs

How to use PLDs?

1. Define the logic function: The first step is to specify the logic function that the PLD will use. This can be achieved by determining the function's inputs, outputs, and desired relationship between the two.
2. Selecting the PLD: The PLD that is most appropriate for the application must be selected after the logic function has been defined. The PLD should be compatible with the programming tools that will be used and contain enough logic gates and other resources to implement the necessary function.
3. Design the PLD: The PLD circuit has to be designed next. A hardware description language (HDL), such as Verilog or VHDL, can be used for this. The connections between the PLD's logic gates and other components are described in the HDL code.
4. Putting the design into practice: After the PLD circuit has been created, it must be put into practice. This procedure transforms the HDL code into a PLD-programmable format. A computer program known as a synthesizer is used to carry out the synthesis process.
5. Program the PLD: Programming the PLD is the following step after creating the design in synthesis. A programming tool offered by the PLD maker can be used to accomplish this. A bitstream that can be loaded into the PLD is produced by the programming tool using the synthesized design as input. The PLD's logic gates and other components' states are represented by a series of binary values called bitstreams.
6. Test the PLD: Testing the PLD is necessary to ensure that it is operating properly after it has been programmed. A test bench or a simulator can be used for this. A software tool that may be used to imitate the PLD's operation is called a simulator. The PLD can be tested using a physical test bench, which is a physical circuit.

How to use FPGAs?

1. Create the logic function: The first step is to create the logic function that the FPGA will use to execute your program. A hardware description language (HDL) like Verilog or VHDL can be used to accomplish this.
2. Give the design a summary: Logic functions must be synthesized after being designed. By use of this procedure, the HDL code is transformed into a form that the FPGA can understand.
3. Design placement and route: Routing and placing the design come next. This procedure establishes where the logic gates and other FPGA components are physically located as well as their connections.
4. Program the FPGA: Programming the FPGA is the next stage. This is done using the synthesized design. The FPGA manufacturer's programming tool can be used to accomplish this. A bitstream that can be fed into the FPGA is produced by the programming tool using the synthesized design as input. The state of the logic gates and other FPGA components are represented by a series of binary numbers called a bitstream.
5. Test the FPGA: Testing the FPGA is necessary to ensure that it is operating properly after it has been programmed. A test bench or a simulator can be used for this. A software tool that can be used to emulate the FPGA's functionality is called a simulator. A physical circuit that may be used to test the FPGA is known as a physical test bench.

Examples of PLDs and FPGAs

Examples of PLDs

• Programmable Array Logic (PAL): A PLD called a Programmable Array Logic (PAL) is made up of an array of AND gates that may each be programmed to be activated or disabled. The final output of the PAL is created by feeding the output of the AND gates into an OR gate.

• Generic Array Logic (GAL): A GAL is a type of generic array logic that is similar to PAL but has an array of OR gates as well, giving it additional versatility in the types of logic operations it may carry out.

• Complex Programmable Logic Device (CPLD): A CPLD, or complex programmable logic device, is a PLD that is more substantial and sophisticated than a PAL or GAL. It often contains a variety of AND gates, OR gates, and flip-flops, enabling it to implement logic operations with greater complexity.

• Field-Programmable Gate Arrays (FPGAs): FPGAs (Field-Programmable Gate Arrays) are the most sophisticated PLDs. They can be designed to accomplish any desired logic function because they are effectively a blank slate. A variety of logic gates, flip-flops, and other components make up FPGAs, which can be coupled in any way needed.

Examples of FPGAs

• Xilinx Spartan-6: The Spartan-6 is a mid-range FPGA that is well-liked for many applications, including networking, industrial control, and telecommunications. It features a memory capacity of up to 128 MB and a logic capacity of up to 500,000 gates.

• Intel Stratix V: The Stratix V is a premium FPGA used in high-performance computing and telecommunications applications that demand high performance and/or low power consumption. It has a memory capacity of up to 4 GB and a logic capacity of up to 2 million gates.

• Altera Arria 10: Like the Stratix V, the Arria 10 is a top-of-the-line FPGA. It has a memory capacity of up to 16 GB and a logic capacity of up to 3 million gates.

• Zynq UltraScale+ by Xilinx: This hybrid FPGA combines an FPGA with a processor core. Due to its adaptability, it can be utilized for a wide range of applications, including machine learning and embedded systems. It has a memory capacity of up to 16 GB and a logic capacity of up to 5 million gates.

Is FPGA a PLD?

Conclusion