Linear Technology_LT1161ISW#PBF
Linear Technology_LT1161ISW#PBF
Linear Technology

LT1161ISW#PBF

FPGAs (Field Programmable Gate Array)
Linear Technology
LT1161ISW#PBF
2-LT1161ISW#PBF
Surface Mount Tube Active EAR99 Gate Drivers ICs Non-Inverting 4 20-SOIC (0.295, 7.50mm Width) LT1161 High-Side
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LT1161ISW#PBF Description

Tech Specifications

Gate Type
N-Channel MOSFET
Surface Mount
YES
Terminal Finish
Matte Tin (Sn)
Number of Functions
4
Terminal Position
DUAL
Package / Case
20-SOIC (0.295, 7.50mm Width)
Turn Off Time
200 µs
JESD-30 Code
R-PDSO-G20
Voltage - Supply
8V~48V
Channel Type
Independent
Terminal Form
GULL WING
Number of Terminations
20
Supply Voltage
24V
ECCN Code
EAR99
Interface IC Type
BUFFER OR INVERTER BASED MOSFET DRIVER
Qualification Status
Not Qualified
RoHS Status
ROHS3 Compliant
Logic Voltage - VIL, VIH
0.8V 2V
Moisture Sensitivity Level (MSL)
1 (Unlimited)
Supply Current-Max
6.5mA
Output Polarity
TRUE
Operating Temperature
-40°C~150°C TJ
Input Type
Non-Inverting
Input Characteristics
GATED
High Side Driver
YES
Driven Configuration
High-Side
Number of Drivers
4
Mounting Type
Surface Mount
JESD-609 Code
e3
Factory Lead Time
8 Weeks
Pin Count
20
Time@Peak Reflow Temperature-Max (s)
30
Peak Reflow Temperature (Cel)
260
Length
12.8015mm
Packaging
Tube
Part Status
Active
Published
2006
Terminal Pitch
1.27mm
Base Part Number
LT1161

LT1161ISW#PBF Documents

Download datasheets and manufacturer documentation for LT1161ISW#PBF

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