Linear Technology
LT1112S8#PBF
FPGAs (Field Programmable Gate Array)
LT1112S8#PBF
2-LT1112S8#PBF
100pA 133 dB Instrumentational OP Amps 0.00035μA 2V~40V ±1V~20V LT1112 8 Pins 8-SOIC (0.154, 3.90mm Width)
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LT1112S8#PBF Description
Tech Specifications
Low-Bias
YES
Unity Gain BW-Nom
750 kHz
Frequency Compensation
YES
Voltage Gain-Min
400000
Gain Bandwidth Product
750kHz
Average Bias Current-Max (IIB)
0.00035μA
Surface Mount
YES
Terminal Finish
Matte Tin (Sn)
Current - Input Bias
100pA
Height Seated (Max)
1.75mm
Number of Functions
2
Terminal Position
DUAL
Package / Case
8-SOIC (0.154, 3.90mm Width)
Low-Offset
YES
JESD-30 Code
R-PDSO-G8
Terminal Form
GULL WING
Number of Terminations
8
Supply Voltage
15V
ECCN Code
EAR99
Amplifier Type
General Purpose
Qualification Status
Not Qualified
RoHS Status
ROHS3 Compliant
Common Mode Rejection Ratio
133 dB
Moisture Sensitivity Level (MSL)
1 (Unlimited)
Operating Temperature
0°C~70°C
Neg Supply Voltage-Nom (Vsup)
-15V
Architecture
VOLTAGE-FEEDBACK
Micropower
YES
Slew Rate
0.3V/μs
Mounting Type
Surface Mount
Current - Supply
350μA
JESD-609 Code
e3
Power Supplies
+-15V
Factory Lead Time
8 Weeks
Pin Count
8
Voltage - Input Offset
25μV
Time@Peak Reflow Temperature-Max (s)
30
Peak Reflow Temperature (Cel)
260
Length
4.9mm
Packaging
Tube
Part Status
Active
Published
2006
Voltage - Supply, Single/Dual (±)
2V~40V ±1V~20V
Number of Circuits
2
Base Part Number
LT1112
LT1112S8#PBF Documents
Download datasheets and manufacturer documentation for LT1112S8#PBF
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