Rochester Electronics, LLC
ADM483EAR
FPGAs (Field Programmable Gate Array)
ADM483EAR
2-ADM483EAR
8 Terminations Receivers 1 Bits 1/1 Drivers/Receivers 1 Functions
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ADM483EAR Description
Tech Specifications
Number of Drivers/Receivers
1/1
Operating Temperature (Min)
-40°C
Surface Mount
YES
Driver Number of Bits
1
Terminal Finish
TIN LEAD
Height Seated (Max)
1.75mm
Number of Functions
1
Terminal Position
DUAL
Package / Case
8-SOIC (0.154, 3.90mm Width)
JESD-30 Code
R-PDSO-G8
Voltage - Supply
4.5V~5.5V
Terminal Form
GULL WING
Number of Terminations
8
Supply Voltage
5V
Operating Temperature (Max)
85°C
Transmit Delay-Max
2000 ns
Protocol
RS422, RS485
Interface Standard
EIA-422; EIA-485
Width
3.9mm
Pbfree Code
no
RoHS Status
Non-RoHS Compliant
Moisture Sensitivity Level (MSL)
1 (Unlimited)
Input Characteristics
DIFFERENTIAL SCHMITT TRIGGER
Receiver Number of Bits
1
Mounting Type
Surface Mount
Differential Output
YES
JESD-609 Code
e0
Pin Count
8
Time@Peak Reflow Temperature-Max (s)
30
Peak Reflow Temperature (Cel)
240
Type
Transceiver
Length
4.9mm
Packaging
Tube
Part Status
Obsolete
Terminal Pitch
1.27mm
Temperature Grade
INDUSTRIAL
Receive Delay-Max
2000 ns
ADM483EAR Documents
Download datasheets and manufacturer documentation for ADM483EAR
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