Analog Devices Inc.
AD823ARZ-RL
FPGAs (Field Programmable Gate Array)
AD823ARZ-RL
2-AD823ARZ-RL
2 Channels 17mA per Channel 5pA 70 dB Instrumentational OP Amps 0.00003μA 3V~36V ±1.5V~18V AD823 8 Pins 8-SOIC (0.154, 3.90mm Width)
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AD823ARZ-RL Description
J-FET Amplifier 2 Circuit Rail-to-Rail 8-SOIC
Tech Specifications
Low-Bias
YES
Gain Bandwidth Product
10MHz
Average Bias Current-Max (IIB)
0.00003μA
Surface Mount
YES
Current - Input Bias
5pA
Radiation Hardening
No
Height Seated (Max)
1.75mm
Number of Functions
2
Package / Case
8-SOIC (0.154, 3.90mm Width)
Number of Channels
2
Lifecycle Status
PRODUCTION (Last Updated: 1 month ago)
Terminal Form
GULL WING
Number of Pins
8
Amplifier Type
J-FET
Input Offset Voltage (Vos)
3.5mV
Max Power Dissipation
900mW
Moisture Sensitivity Level (MSL)
1 (Unlimited)
Operating Temperature
-40°C~85°C
Neg Supply Voltage-Nom (Vsup)
-15V
Architecture
VOLTAGE-FEEDBACK
Packing Method
TAPE AND REEL
Mounting Type
Surface Mount
Pin Count
8
Power Supply Rejection Ratio (PSRR)
70dB
Power Dissipation
900mW
Packaging
Tape & Reel (TR)
Quiescent Current
6.3mA
Voltage - Supply, Single/Dual (±)
3V~36V ±1.5V~18V
Bias Current-Max (IIB) @25C
0.00003μA
Output Type
Rail-to-Rail
Voltage Gain
93.06dB
Frequency Compensation
YES
Terminal Position
DUAL
Operating Supply Current
7mA
Low-Offset
NO
Number of Terminations
8
Input Voltage Noise Density
16nV/sqrt Hz
Supply Voltage
15V
ECCN Code
EAR99
Lead Free
Contains Lead
Pbfree Code
no
RoHS Status
ROHS3 Compliant
Common Mode Rejection Ratio
70 dB
-3db Bandwidth
16MHz
Slew Rate
25V/μs
JESD-609 Code
e3
Factory Lead Time
8 Weeks
Voltage - Input Offset
700μV
Time@Peak Reflow Temperature-Max (s)
30
Peak Reflow Temperature (Cel)
260
Length
4.9mm
Contact Plating
Tin
Output Current per Channel
17mA
Part Status
Active
Base Part Number
AD823
AD823ARZ-RL Documents
Download datasheets and manufacturer documentation for AD823ARZ-RL
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