Minimum System Schematic of STM32F103C8T6
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The STM32F103C8T6 microcontroller, part of STMicroelectronics' STM32 family, is widely used in embedded systems due to its affordability, performance, and extensive features. This article focuses specifically on the minimum system schematic required to operate the STM32F103C8T6 microcontroller. Understanding this basic circuit is essential for prototyping and building reliable embedded applications.
Overview of STM32F103C8T6
The STM32F103C8T6 belongs to the STM32F1 series and is built around the ARM Cortex-M3 core, running at up to 72 MHz. It includes 64 KB of Flash memory, 20 KB of SRAM, and a range of peripherals such as UART, I2C, SPI, ADC, timers, and GPIOs.
Key Specifications:
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Core: ARM Cortex-M3
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Clock Speed: 72 MHz
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Flash Memory: 64 KB
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SRAM: 20 KB
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I/O Pins: 37 GPIO pins (in LQFP48 package)
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Operating Voltage: 2.0V to 3.6V
A minimum system circuit is a basic configuration that ensures the microcontroller can boot and run successfully. It typically includes the following components:
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Power Supply (3.3V)
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Reset Circuit
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Clock Circuit (Crystal oscillator)
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Boot Configuration Pins
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Decoupling Capacitors
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Programming/Debugging Interface
Below, we break down each component and describe how to connect it in the schematic.
Minimum System Schematic Diagram
The following describes the essential components and their connections in the minimum system schematic:
1. Power Supply
The STM32F103C8T6 requires a stable 3.3V power supply to operate. The power pins include:
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VDD: Digital power supply (pins 9, 25, 36, 48)
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VDDA: Analog power supply for ADC and PLL (pin 12)
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VSS: Ground pins (pins 8, 24, 35, 47)
A common power setup uses an LDO voltage regulator like the AMS1117-3.3 to step down a 5V input to 3.3V. Decoupling capacitors must be placed close to each VDD and VDDA pin to filter noise.
Connections:
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3.3V to VDD and VDDA
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GND to VSS
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Decoupling capacitors: 0.1µF near each VDD and 10µF near VDDA
2. Reset Circuit
The NRST pin (pin 7) is used to reset the microcontroller. It is typically pulled up to VDD through a 10kΩ resistor and connected to a push-button for manual resets.
Connections:
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NRST pin -> 10kΩ resistor to VDD
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NRST pin -> Push-button to GND
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Optional: Add a 100nF capacitor to filter noise
3. Clock Circuit
The STM32F103C8T6 requires an external 8 MHz crystal oscillator for accurate clock operation. The crystal connects to the OSC_IN and OSC_OUT pins:
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OSC_IN (pin 5): Crystal input
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OSC_OUT (pin 6): Crystal output
Two 22pF capacitors are connected from each crystal pin to ground to stabilize the clock.
Connections:
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OSC_IN -> Crystal -> OSC_OUT
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OSC_IN and OSC_OUT -> 22pF capacitors to GND
For RTC functionality, a 32.768 kHz crystal can be connected to the OSC32_IN (pin 11) and OSC32_OUT (pin 12) pins.
4. Boot Configuration Pins
The STM32F103C8T6 boot mode is determined by the BOOT0 and BOOT1 pins:
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BOOT0 (pin 44): Selects between bootloader and Flash memory
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Connect to GND for normal operation (boot from Flash)
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Optionally connect to VDD via a jumper for bootloader mode
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BOOT1 (pin 9): Connect to GND for default Flash boot mode
Connections:
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BOOT0 -> GND (via 10kΩ resistor)
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BOOT1 -> GND
5. Decoupling Capacitors
Decoupling capacitors reduce noise and ensure stable operation:
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Place 0.1µF capacitors near each VDD pin
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Place a 10µF capacitor near the VDDA pin
6. Programming/Debugging Interface
The SWD (Serial Wire Debug) interface allows programming and debugging. It consists of:
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SWDIO (pin 46): Data line
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SWCLK (pin 44): Clock line
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NRST: Reset line (optional)
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GND: Common ground
These pins are connected to a programmer/debugger such as the ST-Link V2.
Connections:
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SWDIO -> Programmer SWDIO
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SWCLK -> Programmer SWCLK
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NRST -> Programmer NRST
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GND -> Programmer GND
Minimum System Schematic Summary
Here is a summary of the key connections for the minimum system schematic:
Component | Pins | Connections |
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Power Supply | VDD, VDDA, VSS | 3.3V to VDD/VDDA, GND to VSS |
Reset Circuit | NRST | Pull-up (10kΩ) to VDD, push-button to GND |
Clock Circuit | OSC_IN, OSC_OUT | 8 MHz crystal with 22pF capacitors |
Boot Configuration | BOOT0, BOOT1 | BOOT0 to GND, BOOT1 to GND |
Decoupling Caps | VDD, VDDA | 0.1µF and 10µF capacitors |
SWD Interface | SWDIO, SWCLK, NRST, GND | Connect to programmer/debugger |
Conclusion
The minimum system schematic of the STM32F103C8T6 includes a stable power supply, reset circuit, clock oscillator, boot configuration, decoupling capacitors, and a programming/debugging interface. By implementing this configuration, the STM32F103C8T6 can operate reliably, allowing for further development and testing of embedded applications.
This schematic forms the foundation for any STM32-based project, providing a clear understanding of the essential connections and components required for the microcontroller to function correctly.